職位描述
該職位信息待核驗(yàn),請仔細(xì)了解后再進(jìn)行投遞!
職位描述:
job summary:
digital design engineer works in the development, design, and verification of digital and mixed-signal ics utilizing leading edge technologies with industry standard asic tools. products to be designed/verified include, power management, and mixed signal functions.
essential functions:
? contributes to the design, development, & verification of digital / mixed-signal ic’s
? works closely with senior members of ic design team, collaboration with analog, test & application engineering
? good written/verbal communication english skills and strong team work/collaboration
? digital design and verification/testcases using standard rtl/dv languages (verilog, sysverilog, uvm), strong documentation skills for spec/test plan documents
? knowledge & use of industry standard asic tools/flow for daily work: digital simulators, synthesis tools, dft, lec, sta, etc
? assist test/debug/fgpa verification
qualifications:
? phd or ms/bs with 2 yrs in industry in electrical engineering, telecommunications, or computer science and emphasis digital design/vlsi coursework/projects.
? has the ability to work independently, follow instructions/tasks according to design specifications / procedures
? strong knowledge of asic development process and digital design techniques.
? experience with programming, scripting and automation languages like perl/tcl/unix/phyton and c/c++
? executing tasks that hit project milestone
? knowledge/experience with the following is plus:
o embedded designs and/or firmware development
o knowledge of power management industry/applications
o experience of mixed signal design
o i2c, spi, usb, pmbus/usb-pd
job summary:
digital design engineer works in the development, design, and verification of digital and mixed-signal ics utilizing leading edge technologies with industry standard asic tools. products to be designed/verified include, power management, and mixed signal functions.
essential functions:
? contributes to the design, development, & verification of digital / mixed-signal ic’s
? works closely with senior members of ic design team, collaboration with analog, test & application engineering
? good written/verbal communication english skills and strong team work/collaboration
? digital design and verification/testcases using standard rtl/dv languages (verilog, sysverilog, uvm), strong documentation skills for spec/test plan documents
? knowledge & use of industry standard asic tools/flow for daily work: digital simulators, synthesis tools, dft, lec, sta, etc
? assist test/debug/fgpa verification
qualifications:
? phd or ms/bs with 2 yrs in industry in electrical engineering, telecommunications, or computer science and emphasis digital design/vlsi coursework/projects.
? has the ability to work independently, follow instructions/tasks according to design specifications / procedures
? strong knowledge of asic development process and digital design techniques.
? experience with programming, scripting and automation languages like perl/tcl/unix/phyton and c/c++
? executing tasks that hit project milestone
? knowledge/experience with the following is plus:
o embedded designs and/or firmware development
o knowledge of power management industry/applications
o experience of mixed signal design
o i2c, spi, usb, pmbus/usb-pd
工作地點(diǎn)
地址:成都郫都區(qū)成都-郫都區(qū)
??
點(diǎn)擊查看地圖
詳細(xì)位置,可以參考上方地址信息
求職提示:用人單位發(fā)布虛假招聘信息,或以任何名義向求職者收取財(cái)物(如體檢費(fèi)、置裝費(fèi)、押金、服裝費(fèi)、培訓(xùn)費(fèi)、身份證、畢業(yè)證等),均涉嫌違法,請求職者務(wù)必提高警惕。
職位發(fā)布者
HR
成都芯源系統(tǒng)有限公司
-
電子技術(shù)·半導(dǎo)體·集成電路
-
1000人以上
-
公司性質(zhì)未知
-
高新區(qū)綜合保稅區(qū)科新路8號
相似職位
-
工藝工程師 6000-8000元不限 大專南京萬德體育產(chǎn)業(yè)集團(tuán)有限公司
-
機(jī)械結(jié)構(gòu)設(shè)計(jì)師 8000-10000元不限 大專南京萬德體育產(chǎn)業(yè)集團(tuán)有限公司
-
醫(yī)藥信息溝通專員 面議不限 不限江蘇恒瑞醫(yī)藥股份有限公司
-
生產(chǎn)主管 5000-10000元不限 大專美嘉機(jī)電(南京)有限公司
-
采購工程師 5000-7000元不限 大專南京萬德體育產(chǎn)業(yè)集團(tuán)有限公司
-
外貿(mào)銷售助理 面議不限 大專南京龍靈機(jī)械貿(mào)易有限公司

2年以上
本科
最近更新
4426人關(guān)注
注:聯(lián)系我時(shí),請說是在江蘇人才網(wǎng)上看到的。
